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 LT1468-2 200MHz, 30V/s 16-Bit Accurate AV 2 Op Amp FEATURES
n n n n n n n n n n n n n n n
DESCRIPTION
The LT(R)1468-2 is a precision high speed operational amplifier with 16-bit accuracy, decompensated to be stable in a gain of 2 or greater. The combination of precision and AC performance makes the LT1468-2 the optimum choice for high accuracy applications such as DAC current-to-voltage conversion and ADC buffers. The initial accuracy and drift characteristics of the input offset voltage and inverting input bias current are tailored for inverting applications. The 200MHz gain bandwidth ensures high open-loop gain at frequency for reducing distortion. In noninverting applications such as an ADC buffer, the low distortion and DC accuracy allow full 16-bit AC and DC performance. The high slew rate of the LT1468-2 improves large-signal performance in applications such as active filters and instrumentation amplifiers compared to other precision op amps. The LT1468-2 is specified on power supply voltages of 5V and 15V and from -40C to 85C. For a unity-gain stable op amp with same DC performance, see the LT1468 datasheet.
L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
Stable in Gain AV 2 (AV = -1) 200MHz Gain Bandwidth Product 30V/s Slew Rate Settling Time: 800ns (10V Step, 150V) Specified at 5V and 15V Supplies Low Distortion, - 96.5dB for 100kHz, 10VP-P Maximum Input Offset Voltage: 75V Maximum Input Offset Voltage Drift: 2V/C Maximum (-) Input Bias Current: 10nA Minimum DC Gain: 1000V/mV Minimum Output Swing into 2k: 12.8V Input Noise Voltage: 5nV/Hz Input Noise Current: 0.6pA/Hz Total Input Noise Optimized for 1k < RS < 20k Available in an 8-Lead Plastic SO Package and 8-Lead DFN Package
APPLICATIONS
n n n n n n
16-Bit DAC Current-to-Voltage Converter Precision Instrumentation ADC Buffer Low Distortion Active Filters High Accuracy Data Acquisition Systems Photodiode Amplifiers
TYPICAL APPLICATION
16-Bit DAC I-to-V Converter Large Signal Transient, AV = -1
10V VS = 15V AV = -1 RF = RG = 2k CF = 22pF
20pF DAC INPUTS 16 6k
-
LT1468-2
2k VOUT 50pF
2V/DIV
LTC 1597
(R)
+
0V OPTIONAL NOISE FILTER OFFSET: VOS + IB (6k) < 1LSB SETTLING TIME TO 150V = 1.6s SETTLING LIMITED BY 6k AND 20pF TO COMPENSATE DAC OUTPUT CAPACITANCE
14682 TA01
200ns/DIV
14682 TA02
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1
LT1468-2 ABSOLUTE MAXIMUM RATINGS
(Note 1)
Total Supply Voltage (V+ to V -).................................36V Maximum Input Current (Note 2) ...........................10mA Output Short-Circuit Duration (Note 3) ............ Indefinite Operating Temperature Range ................. -40C to 85C
Specified Temperature Range (Note 4) .... -40C to 85C Junction Temperature ........................................... 150C Storage Temperature Range................... -65C to 150C Lead Temperature (Soldering, 10 sec) for S8 Only........................................................ 300C
PIN CONFIGURATION
TOP VIEW NULL 1 -IN 2 +IN 3 V- 4 8 DNC* V+ OUT NULL NULL 1 -IN 2 +IN 3 V- 4 TOP VIEW 8 7 6 5 DNC* V+ VOUT NULL
+ -
7 6 5
DD PACKAGE 8-LEAD (3mm x 3mm) PLASTIC DFN
S8 PACKAGE 8-LEAD PLASTIC SO *DO NOT CONNECT
TJMAX = 150C, JA = 43C/W EXPOSED PAD IS INTERNALLY CONNECTED TO V-
TJMAX = 150C, JA = 190C/W
ORDER INFORMATION
LEAD FREE FINISH LT1468CS8-2#PBF LT1468IS8-2#PBF LT1468ACDD-2#PBF LT1468AIDD-2#PBF LT1468CDD-2#PBF LT1468IDD-2#PBF TAPE AND REEL LT1468CS8-2#TRPBF LT1468IS8-2#TRPBF LT1468ACDD-2#TRPBF LT1468AIDD-2#TRPBF LT1468CDD-2#TRPBF LT1468IDD-2#TRPBF PART MARKING* PACKAGE DESCRIPTION 14682 14682 LDSY LDSY LDSY LDSY 8-Lead Plastic Small Outline 8-Lead Plastic Small Outline 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN 8-Lead (3mm x 3mm) Plastic DFN SPECIFIED TEMPERATURE RANGE 0C to 70C -40C to 85C 0C to 70C -40C to 85C 0C to 70C -40C to 85C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCM = 0V unless otherwise noted.
SYMBOL VOS PARAMETER Input Offset Voltage CONDITIONS S8 Package LT1468A, DD Package LT1468, DD Package IOS Input Offset Current VSUPPLY 15V 5V 15V 5V 15V 5V 5V to 15V MIN TYP 30 50 30 50 100 150 13 MAX 75 175 75 175 200 300 50 UNITS V V V V V V nA
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ELECTRICAL CHARACTERISTICS
2
LT1468-2 ELECTRICAL CHARACTERISTICS
SYMBOL IB IB
- +
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VCM = 0V unless otherwise noted.
PARAMETER Inverting Input Bias Current Noninverting Input Bias Current Input Noise Voltage 0.1Hz to 10Hz f = 10kHz f = 10kHz VCM = 12.5V Differential Input Noise Voltage Input Noise Voltage Input Resistance Input Capacitance Input Voltage Range + Input Voltage Range - CMRR Common Mode Rejection Ratio Power Supply Rejection Ratio Large-Signal Voltage Gain VCM = 12.5V VCM = 2.5V VS = 4.5V to 15V VOUT = 12.5V, RL = 10k VOUT = 12.5V, RL = 2k VOUT = 2.5V, RL = 10k VOUT = 2.5V, RL = 2k RL = 10k RL = 2k RL = 10k RL = 2k VOUT = 12.5V VOUT = 2.5V VOUT = 0V, VIN = 0.2V RL = 2k (Note 5) 10V Peak, (Note 6) 3V Peak, (Note 6) f = 100kHz, RL = 2k 10V Step, 0.01%, AV = -1 10V Step, 150V, AV = -1 5V Step, 0.01%, AV = -1 AV = -1, f = 100kHz 15V 15V 5V 5V 15V 15V 5V 5V 15V 5V 15V 15V 5V 15V 5V 15V 5V 15V 15V 5V 15V 15V 5V 140 130 CONDITIONS VSUPPLY 5V to 15V 5V to 15V 5V to 15V 5V to 15V 5V to 15V 15V 15V 15V 15V 5V 15V 5V 15V 5V 96 96 100 1000 500 1000 500 13.0 12.8 3.0 2.8 15 15 25 20 15 12.5 2.5 100 50 MIN TYP 3 -10 0.3 5 0.6 240 150 4 13.5 3.5 -14.3 -4.3 110 112 112 9000 5000 6000 3000 13.6 13.5 3.6 3.5 22 22 40 30 22 475 1160 200 190 650 800 550 0.02 3.9 3.6 5.2 5.0 -12.5 -2.5 MAX 10 40 UNITS nA nA VP-P nV/Hz pA/Hz M k pF V V V V dB dB dB V/mV V/mV V/mV V/mV V V V V mA mA mA V/s V/s kHz kHz MHz MHz ns ns ns mA mA
en in RIN CIN
PSRR AVOL
VOUT
Output Swing
IOUT ISC SR
Output Current Short-Circuit Current Slew Rate Full-Power Bandwidth
GBW ts
Gain Bandwidth Settling Time
RO IS
Output Resistance Supply Current
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. 0C TA 70C, VCM = 0V unless otherwise noted.
SYMBOL VOS PARAMETER Input Offset Voltage CONDITIONS S8 Package LT1468A, DD Package LT1468, DD Package VSUPPLY 15V 5V 15V 5V 15V 5V

MIN
TYP
MAX 150 250 150 250 300 400
UNITS V V V V V V
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3
LT1468-2 ELECTRICAL CHARACTERISTICS
SYMBOL IOS IB IB
-
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. 0C TA 70C, VCM = 0V unless otherwise noted.
PARAMETER Input VOS Drift Input Offset Current Input Offset Current Drift Inverting Input Bias Current Negative Input Current Drift
+
CONDITIONS (Note 7)
VSUPPLY 5V to 15V 5V to 15V 5V to 15V 5V to 15V 5V to 15V 5V to 15V

MIN
TYP 0.7 60
MAX 2.0 65 15
UNITS V/C nA pA/C nA pA/C nA dB dB dB V/mV V/mV V/mV V/mV V V V V mA mA mA V/s V/s
40 50 94 94 98 500 250 500 250 12.9 12.7 2.9 2.7 12.5 12.5 17 18 13 130 120 200 190 6.5 6.3
Noninverting Input Bias Current Common Mode Rejection Ratio Power Supply Rejection Ratio Large-Signal Voltage Gain VCM = 12.5V VCM = 2.5V VS = 4.5V to 15V VOUT = 12.5V, RL = 10k VOUT = 12.5V, RL = 2k VOUT = 2.5V, RL = 10k VOUT = 2.5V, RL = 2k RL = 10k RL = 2k RL = 10k RL = 2k VOUT = 12.5V VOUT = 2.5V VOUT = 0V, VIN = 0.2V RL = 2k (Note 5) f = 100kHz, RL = 2k
CMRR PSRR AVOL
15V 5V 15V 15V 5V 5V 15V 15V 5V 5V 15V 5V 15V 15V 5V 15V 5V 15V 5V
VOUT
Output Swing
IOUT ISC SR GBW IS
Output Current Short-Circuit Current Slew Rate Gain Bandwidth Supply Current
MHz MHz mA mA
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. -40C TA 85C, VCM = 0V unless otherwise noted.
SYMBOL VOS PARAMETER Input Offset Voltage CONDITIONS S8 Package LT1468A, DD Package LT1468, DD Package Input VOS Drift IOS IB IB
-
VSUPPLY 15V 5V 15V 5V 15V 5V 5V to 15V 5V to 15V 5V to 15V 5V to 15V 5V to 15V 5V to 15V

MIN
TYP
MAX 230 330 230 330 400 500
UNITS V V V V V V V/C nA pA/C nA pA/C nA dB dB dB
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(Note 7)
0.7 120
2.5 80 30
Input Offset Current Input Offset Current Drift Inverting Input Bias Current Negative Input Current Drift Noninverting Input Bias Current Common Mode Rejection Ratio Power Supply Rejection Ratio VCM = 12.5V VCM = 2.5V VS = 4.5V to 15V
80 60 92 92 96
+
CMRR PSRR
15V 5V
4
LT1468-2 ELECTRICAL CHARACTERISTICS
SYMBOL AVOL PARAMETER Large-Signal Voltage Gain
The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. -40C TA 85C, VCM = 0V unless otherwise noted.
CONDITIONS VOUT = 12V, RL = 10k VOUT = 10V, RL = 2k VOUT = 2.5V, RL = 10k VOUT = 2.5V, RL = 2k RL = 10k RL = 2k RL = 10k RL = 2k VOUT = 12.5V VOUT = 2.5V VOUT = 0V, VIN = 0.2V RL = 2k (Note 5) f = 100kHz, RL = 2k VSUPPLY 15V 15V 5V 5V 15V 15V 5V 5V 15V 5V 15V 15V 5V 15V 5V 15V 5V

MIN 300 150 300 150 12.8 12.6 2.8 2.6 7 7 12 15 11 110 100
TYP
MAX
UNITS V/mV V/mV V/mV V/mV V V V V mA mA mA V/s V/s
VOUT
Output Swing
IOUT ISC SR GBW IS
Output Current Short-Circuit Current Slew Rate Gain Bandwidth Supply Current
200 190 7.0 6.8
MHz MHz mA mA
Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs are protected by back-to-back diodes and two 100 series resistors. If the differential input voltage exceeds 0.7V, the input current should be limited to 10mA. Input voltages outside the supplies will be clamped by ESD protection devices and input currents should also be limited to 10mA. Note 3: A heat sink may be required to keep the junction temperature below absolute maximum when the output is shorted indefinitely.
Note 4: The LT1468C-2 is guaranteed to meet specified performance from 0C to 70C and is designed, characterized and expected to meet these extended temperature limits, but is not tested at - 40C and at 85C. The LT1468I-2 is guaranteed to meet the extended temperature limits. Note 5: Slew rate is measured between 8V on the output with 12V input for 15V supplies and 2V on the output with 3V input for 5V supplies. Note 6: Full power bandwidth is calculated from the slew rate measurement: FPBW = SR/2VP Note 7: This parameter is not 100% tested.
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Supply Voltage and Temperature
7 6 COMMON MODE RANGE (V) SUPPLY CURRENT (mA) 125C 5 4 25C 3 -55C 2 1 0 5 10 15 SUPPLY VOLTAGE (V) 20
14682 G01
Input Common Mode Range vs Supply Voltage
V+ -0.5 -1.0 -1.5 -2.0 TA = 25C VOS < 100V INPUT BIAS CURRENT (nA) 80 60 40 20 0 -20 -40 -60 0 3 9 12 6 SUPPLY VOLTAGE (V) 15 18
Input Bias Current vs Input Common Mode Voltage
VS = 15V TA = 25C
IB- IB+
2.0 1.5 1.0 0.5 V-
-80 -15
-10 -5 5 10 0 INPUT COMMON MODE VOLTAGE (V)
15
14682 G02
14682 G03
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5
LT1468-2 TYPICAL PERFORMANCE CHARACTERISTICS
Input Bias Current vs Temperature
30 VS = 15V 20 INPUT BIAS CURRENT (nA) 10 0 -10 -20 -30 -40 -50 -25 IB+ IB- 1000 INPUT VOLTAGE NOISE (nV/Hz) VS = 15V TA = 25C AV = 101 RS = 100k FOR in 1
Input Noise Spectral Density
10 INPUT CURRENT NOISE (pA/Hz)
0.1Hz to 10Hz Voltage Noise
VS = 15V
100
in
en 10 0.1
50 25 75 0 TEMPERATURE (C)
100
125
1 1 10 100 1k FREQUENCY (Hz) 10k
0.01 100k
14682 G05
VOLTAGE NOISE (100nV/DIV)
TIME (1s/DIV)
14682 G06
14682 G04
Warm-Up Drift vs Time
5 0 OFFSET VOLTAGE DRIFT (V) 135 OPEN-LOOP GAIN (dB) -5 -10 -15 -20 -25 -30 -35 -40 0 20 40 60 80 100 120 TIME AFTER POWER UP (s) 140
14682 G07
Open-Loop Gain vs Resistive Load
140 160 TA = 25C VS = 15V VS = 5V OPEN-LOOP GAIN (dB) 150
Open-Loop Gain vs Temperature
RL = 2k VS = 15V 140 130 VS = 5V 120 110 100 90 -50 -25
S0-8 5V 130 125 120 115 110 10 100 1k LOAD RESISTANCE () 10k
14682 G08
S0-8 15V
50 25 75 0 TEMPERATURE (C)
100
125
14682 G09
Output Voltage Swing vs Supply Voltage
V+ -1 OUTPUT VOLTAGE SWING (V) -2 -3 -4 4 3 2 1 V
-
Output Voltage Swing vs Load Current
V+ -0.5 -1.0 OUTPUT VOLTAGE SWING (V) -1.5 -2.0 -2.5 25C -40C OUTPUT SHORT-CIRCUIT CURRENT (mA) VS = 15V 60 85C 55 50 45 40 35 30 25 20 15
Output Short-Circuit Current vs Temperature
VS = 15V VIN = 0.2V SOURCE SINK
RL = 2k RL = 10k
2.5 2.0 1.5 1.0 40C 25C
RL = 2k TA = 25C 0 RL = 10k 5 10 15 SUPPLY VOLTAGE (V) 20
14682 G10
85C
V- 0.5 -20 -15 -10 -5 0 10 5 OUTPUT CURRENT (mA)
15
20
10 -50
-25
50 25 0 75 TEMPERATURE (C)
100
125
14682 G11
14682 G12
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6
LT1468-2 TYPICAL PERFORMANCE CHARACTERISTICS
Open-Loop Gain and Phase vs Frequency
70 60 50 GAIN (dB) 40 30 20 GAIN PHASE 100 80 60 GAIN (dB) 40 20 0 PHASE (DEG) 6
Gain vs Frequency, AV = -1
TA = 25C 5 AV = -1 4 RF = RG = 2k CF = 6.8pF 3 RL = 500 2 1 0 -1 -2 -3 -40 -60 100M
14682 G13
Output Impedance vs Frequency
100 VS = 15V TA = 25C 10 OUTPUT IMPEDANCE () AV = 100 1 AV = 10 0.1 AV = -1 0.01
CL = 100pF CL = 47pF CL = 22pF
NO CL
TA = 25C 10 AV = -1 RF = RG = 5.1k 0 CF = 5pF RL = 2k -10 100k 10k 1M 10M FREQUENCY (Hz)
-20
-4 -5 100k 1M 10M FREQUENCY (Hz) 100M
14682 G14 14682 G15
0.001 10k
100k
1M 10M FREQUENCY (Hz)
100M
Undistorted Output Swing vs Frequency, VS = 15V
30 OUTPUT VOLTAGE SWING (VP-P) OUTPUT VOLTAGE SWING (VP-P) 25 AV = -1 20 15 10 VS = 15V 5 TA = 25C RL = 2k THD<1% 0 1 10 9 8
Undistorted Output Swing vs Frequency, VS = 5V
10 8 6 OUTPUT STEP (V) 4 2 0 -2 -4 -6 -8 1000 2000
14682 G17
Settling Time vs Output Step
VS = 15V TA = 25C RF = RG = 2.5k RL = 5k CF = 8pF AV = -1 150V 0.01% 0.1%
7 6 5 4 3 VS = 5V TA = 25C 1 RL = 2k THD<1% 0 1 10 100 FREQUENCY (kHz) 2 AV = -1
0.1% 150V 0.01% 0 100 200 300 400 500 600 700 800 900 1000 SETTLING TIME (ns)
14682 G18
10 100 FREQUENCY (kHz)
1000
14682 G16
-10
Settling Time vs Output Step
10 8 6 OUTPUT STEP (V) 4 2 0 -2 -4 -6 -8 -10 0.01% VS = 15V TA = 25C RF = RG = 1k RL = 5k INTO DIODES CF = 22pF AV = 2 RL = 511/30pF 20mV/DIV 0.01%
Small-Signal Transient, AV = -1
VS = 15V 10V
Large-Signal Transient, AV = -1
VS = 15V AV = -1 RF = RG = 2k CL = 22pF
2V/DIV
0V
50ns/DIV
14682 G20
200ns/DIV
14682 G21
0 100 200 300 400 500 600 700 800 900 1000 SETTLING TIME (ns)
14682 G19
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7
LT1468-2 APPLICATIONS INFORMATION
The LT1468-2 may be inserted directly into many operational amplifier applications improving both DC and AC performance, provided that the nulling circuitry is removed. The suggested nulling circuit for the LT1468-2 is shown below.
V+ 3
and minimize leakage (i.e., 1.5G of leakage between an input and a 15V supply will generate 10nA--equal to the maximum IB- specification.) Board leakage can be minimized by encircling the input circuitry with a guard ring operated at a potential close to that of the inputs. For inverting configurations tie the ring to ground, in noninverting connections tie the ring to the inverting input (note the input capacitance will increase which may require a compensating capacitor as discussed below.) Microvolt level error voltages can also be generated in the external circuitry. Thermocouple effects caused by temperature gradients across dissimilar metals at the contacts to the inputs can exceed the inherent drift of the amplifier. Air currents over device leads should be minimized, package leads should be short, and the two input leads should be as close together as possible and maintained at the same temperature. Make no connection to Pin 8. This pin is used for factory trim of the inverting input current. The parallel combination of the feedback resistor and gain setting resistor on the inverting input can combine with the input capacitance to form a pole that can cause peaking or even oscillations. A feedback capacitor of the value: CF = (RG)(CIN/RF) may be used to cancel the input pole and optimize dynamic performance. For applications where the DC noise gain is one, and a large feedback resistor is used, CF should be less than or equal to one half of CIN. An example would be a DAC I-to-V converter as shown on the front page of this data sheet where the DAC can have many tens of pF of output capacitance.
Nulling Input Capacitance
Offset Nulling
0.1F 2.2F
+
LT1468-2
76 4
2
-
5 1 100k
0.1F
2.2F
V-
14682 AI01
Gain of 2 Stable The LT1468-2 is a decompensated version of the LT1468. The precision DC performance is identical, but the internal compensation capacitors have been reduced to a point where the op amp needs a gain of 2 or greater in order to be stable. In general, for applications where the gain around the op amp is 2, the decompensated version should be used, because it will give the best AC performance. In applications where the gain is < 2, the unity-gain stable version should be used. The appropriate way to define the `gain' is as the inverse of the feedback ratio from output to differential input, including all relevant parasitics. Moreover, as with all feedback loops, the stability of the loop depends on the value of that feedback ratio at frequencies where the total loop-gain would cross unity. Therefore, it is possible to have circuits in which the gain at DC is lower than the gain at high frequency, and these circuits can be stable even with a non unity-gain stable op amp. An example is many current-output DAC buffer applications. Layout and Passive Components The LT1468 requires attention to detail in board layout in order to maximize DC and AC performance. For best AC results (for example fast settling time) use a ground plane, short lead lengths, and RF-quality bypass capacitors (0.01F to 0.1F) in parallel with low ESR bypass capacitors (1F to 10F tantalum). For best DC performance, use "star" grounding techniques, equalize input trace lengths
RF CF
RG CIN VIN
-
LT1468-2 VOUT
+
14682 AI02
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8
LT1468-2 APPLICATIONS INFORMATION
Input Considerations Each input of the LT1468-2 is protected with a 100 series resistor and back-to-back diodes across the bases of the input devices. If the inputs can be pulled apart, the input current should be limited to less than 10mA with an external series resistor. Each input also has two ESD clamp diodes--one to each supply. If an input is driven above the supply, limit the current with an external resistor to less than 10mA. The LT1468-2 employs bias current cancellation at the inputs. The inverting input current is trimmed at zero common mode voltage to minimize errors in inverting applications such as I-to-V converters. The noninverting input current is not trimmed and has a wider variation and therefore a larger maximum value. As the input offset current can be greater than either input current, the use of balanced source resistance is NOT recommended as it actually degrades DC accuracy and also increases noise. The input bias currents vary with common mode voltage as shown in the Typical Performance Characteristics. The cancellation circuitry was not designed to track this common mode voltage because the settling time would have been adversely affected. The LT1468 inputs can be driven to the negative supply and to within 0.5V of the positive supply without phase reversal. As the input moves closer than 0.5V to the positive supply, the output reverses phase. Total Input Noise The curve of Total Noise vs Unmatched Source Resistance in the Typical Performance Characteristics shows that with source resistance below 1k, the voltage noise of the amplifier dominates. In the 1k to 20k region the increase in noise is due to the source resistance. Above 20k the input current noise component is larger than the resistor noise.
Input Stage Protection
R1 100 +IN
Q1
Q2
R2 100 -IN
14682 AI03
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9
LT1468-2 SIMPLIFIED SCHEMATIC
V+ I1 I2 Q8 +IN Q1 Q2 -IN Q5 Q6 Q7 Q3 Q4 BIAS C Q11 I5 Q10 Q9 OUT
I3 V-
I4
I6
14682 SS
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10
LT1468-2 PACKAGE DESCRIPTION
S8 Package 8-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
.045 .005
8 .189 - .197 (4.801 - 5.004) NOTE 3 7 6 5
.050 BSC
.245 MIN
.160 .005 .228 - .244 (5.791 - 6.197)
.150 - .157 (3.810 - 3.988) NOTE 3
.030 .005 TYP RECOMMENDED SOLDER PAD LAYOUT
.010 - .020 x 45 (0.254 - 0.508) .008 - .010 (0.203 - 0.254) .016 - .050 (0.406 - 1.270) NOTE: 1. DIMENSIONS IN 0- 8 TYP
1
2
3
4
.053 - .069 (1.346 - 1.752)
.004 - .010 (0.101 - 0.254)
INCHES (MILLIMETERS) 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm)
.014 - .019 (0.355 - 0.483) TYP
.050 (1.270) BSC
SO8 0303
DD Package 8-Lead (3mm x 3mm) Plastic DFN
(LTC DWG # 05-08-1210)
.520 (13.208) MAX 8 7 6 5 .485 (12.319) MAX .165 (4.191) MAX
.005 (0.127) MIN
.020 - .060 (0.508 - 1.524)
PIN NO. 1 IDENT 1 2 3 4
.290 (7.366) TYP
.008 - .015 (0.203 - 0.381) .300 (7.620) REF .125 .054 (3.175) (1.372) MIN TYP .015 - .023 (0.381 - 0.584)
.100 (2.54) BSC
D8 0801
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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
11
LT1468-2 TYPICAL APPLICATION
16-Bit ADC Buffer
22pF
1k 1k
-
LT1468-2
200 LTC1605 1000pF 33.2k CAP 2.2F
16 BITS
VIN
+
14682 TA04
RELATED PARTS
PART NUMBER LT1167 LT1468 LT1468-2 LT1469 LT1469-2 LTC1597 LTC1604 LTC1605 DESCRIPTION Precision Instrumentation Amplifier Single 200MHz, 30V/s, 16-Bit Accurate AV 2 Op Amp Single 90MHz, 22V/s, 16-Bit Accurate Op Amp Dual 200MHz, 30V/s, 16-Bit Accurate AV 2 Op Amp Dual 90MHz, 22V/s, 16-Bit Accurate Op Amp 16-Bit Parallel Multiplying IOUT DAC 16-Bit, 333ksps Sampling ADC Single 5V, 16-Bit, 100ksps Sampling ADC COMMENTS Single Resistor Gain Set, 0.04% Max Gain Error, 10ppm Max Gain Nonlinearity 75V VOS(MAX) 75V VOS(MAX) 75V VOS(MAX) 75V VOS(MAX) 1LSB Max INL/DNL, Low Glitch, DAC8043 16-Bit Upgrade 1LSB Max INL/DNL, Low Glitch, On-Chip Bipolar Resistors 2.5V Input, SINAD = 90dB, THD = -100dB Low Power, 10V Inputs, Parallel/Byte Interface
LTC1595/LTC1596 16-Bit Serial Multiplying IOUT DACs
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12 Linear Technology Corporation
(408) 432-1900 FAX: (408) 434-0507
LT 0808 * PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2008


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